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                <h2 id="1、前言"><a href="#1、前言" class="headerlink" title="1、前言"></a>1、前言</h2><p>上一篇笔记分享了使用make工具编译C程序的方法（<a href="https://zhengnianli.github.io/2019/05/15/linux-bi-ji-make-gong-cheng-guan-li-gong-ju-yi/" target="_blank" rel="noopener">【Linux笔记】make工程管理工具（一）</a>），但是还未分享make工具是什么，本篇笔记就来看一下make工具是什么吧。</p>
<p>make和Makefile（或者makefile）文件提供了一种简单有效的工程管理方式。Makefile文件是一个决定着如何编译工程的文本，有一定的书写规则。make是一个GNU命令工具，用来解释Makefile文件中的命令来编译我们的工程。</p>
<h2 id="2、make工具"><a href="#2、make工具" class="headerlink" title="2、make工具"></a>2、make工具</h2><p><code>make</code> 是一个命令工具，是一个解释 <code>Makefile</code> 中指令的命令工具，一般来说，大多数的 IDE（集成开发环境） 都有这个命令，比如：<code>Delphi</code> 的 make，<code>Visual C++</code>的 nmake。但是在<code>Linux</code> 下一般不具有IDE，所以我们需要学会如何使用make工具来编译。</p>
<h2 id="3、Makefile文件的书写规范"><a href="#3、Makefile文件的书写规范" class="headerlink" title="3、Makefile文件的书写规范"></a>3、Makefile文件的书写规范</h2><p><code>Makefile</code>文件中最重要的是规则。规则的格式如下：</p>
<pre class=" language-c"><code class="language-c">target<span class="token punctuation">:</span>prerequisites 
    command</code></pre>
<p>其中，<code>target</code> 为目标，<code>prerequisites</code> 为依赖。<code>command</code> 为make需要执行的命令。</p>
<ul>
<li><p>目标：往往是程序的中间或者最终生成的文件名，比如目标文件、可执行文件等。</p>
</li>
<li><p>依赖：是指用来产生目标文件的输入文件名，一个目标往往依赖于一个或多个文件。</p>
</li>
<li><p>命令：是指任何一个文件发生改动之后，需要重新生成目标文件需要执行的命令，这里可以有多条命令，但是每个命令必须单独占一行，且需要注意的是，每个命令的前面必须有一个<code>&lt;tab键&gt;</code>，因为make是用过<tab>来识别命令行的，进而完成相应的动作。</tab></p>
</li>
</ul>
<p>例如，上一篇我们的笔记中为编译<code>hello.c</code>书写的<code>Makefile</code>文件如下：</p>
<p><img src="https://s2.ax1x.com/2019/07/01/Z87FtH.png" alt></p>
<p>其中，第<code>1、2</code>行为一条规则，第<code>4、5</code>行为一条规则，第<code>7、8</code>行为一条规则，第<code>10、11</code>行为一条规则，第<code>13、14</code>行为一条规则。</p>
<p>拿第<code>1、2</code>行这一条规则来举例说明， <code>hello</code> 为目标文件， <code>hello.o</code> 为依赖文件， <code>gcc hello.o -o hello</code> 为命令。除此之外，这个文件中， <code>#</code>符号后面是注释， <code>clean</code> 是一个特殊的目标，它没有依赖，称为<code>伪目标</code>。</p>
<p>规则是Makefile文件中的最基本的、也是最核心的部分。Makefile中还有其他内容。</p>
<p>Makefile文件主要包含5个方面内容：显示规则、隐式规则、变量、文件指示、注释、实目标与伪目标等。</p>
<p>（1）<code>显式规则</code>。显式规则说明了，如何生成一个或多的的目标文件。这是由 Makefile 的书写者明显指出，要生成的文件，文件的依赖文件，生成的命令。如</p>
<pre class=" language-c"><code class="language-c">hello<span class="token punctuation">:</span>hello<span class="token punctuation">.</span>o
    gcc hello<span class="token punctuation">.</span>o <span class="token operator">-</span>o hello</code></pre>
<p>这就是一条显示规则。</p>
<p>（2）<code>隐式规则</code>。隐含规则是系统或用户预先定义好的一些特殊规则，主要是一些常用的依赖关系和更新命令。一般规则使用文件的全名，而隐含规则中出现的目标文件和依赖文件都只使用文件的扩展名。</p>
<p>如果Makefile 文件里面没有显式给出文件的依赖关系的时候，make 就会根据文件的扩展名找到相应的隐含规则，然后按照隐含规则来更新目标。隐式规则的例子是：</p>
<pre class=" language-c"><code class="language-c">hello<span class="token punctuation">:</span>hello<span class="token punctuation">.</span>o
    $<span class="token punctuation">(</span>CC<span class="token punctuation">)</span> $<span class="token operator">^</span> <span class="token operator">-</span>o $@</code></pre>
<p>（3）<code>变量定义</code>。在 Makefile 中我们要定义一系列的变量，变量一般都是字符串，这个有点像 C 语言中的宏，当 Makefile 被执行时，其中的变量都会被扩展到相应的引用位置上。如：</p>
<p><img src="https://s2.ax1x.com/2019/07/01/Z87uB8.png" alt></p>
<p>其中 <code>CC</code> 为变量的定义， <code>$(CC)</code> 为变量的调用。 <code>$^</code>、 <code>$@</code>也是变量的调用，这两个变量是Makefile文件中最常用的变量（不需要自己定义），<code>$^</code> 代表当前规则中所有的依赖文件， <code>$@</code> 代表当前规则的目标文件。</p>
<p>（4）<code>文件指示</code>。其包括了三个部分，一个是在一个 Makefile 中引用另一个 Makefile，就像 C 语言中的 <code>include</code> 一样；另一个是指根据某些情况指定 Makefile 中的有效部分，就像 C 语言中的预编译<code>#if</code> 一样；还有就是定义一个多行的命令。</p>
<p>（5）<code>注释</code>。Makefile 中只有行注释，和 UNIX 的 <code>Shell</code> 脚本一样，其注释是用 <code>#</code> 字符，这个就像<code>C/C++</code>中的<code>//</code>一样。如果你要在你的Makefile 中使用<code>#</code>字符，可以用反斜框进行转义，如：<code>\#</code>。</p>
<p>（6）<code>实目标与伪目标</code>。Makefile 文件中的目标分为两类：实目标和伪目标。</p>
<p>实目标是真正要生成的以文件形式存放在磁盘上的目标。如：</p>
<pre class=" language-c"><code class="language-c">hello<span class="token punctuation">:</span>hello<span class="token punctuation">.</span>o
    $<span class="token punctuation">(</span>CC<span class="token punctuation">)</span> $<span class="token operator">^</span> <span class="token operator">-</span>o $@ # 链接</code></pre>
<p>其中，<code>hello</code> 文件就是实目标；</p>
<p>而伪目标不要求生成实际的文件，它主要是用于完成一些辅助操作。如：</p>
<pre class=" language-c"><code class="language-c">clean<span class="token punctuation">:</span>
    rm <span class="token operator">-</span>rf hello<span class="token punctuation">.</span>i hello<span class="token punctuation">.</span>s hello<span class="token punctuation">.</span>o hello # 删除编译生成文件</code></pre>
<p>其中的 <code>clean</code> 就是一个伪目标。我们在命令里面输入命令： <code>make clean</code> 就可以执行删除操作： <code>rm -rf hello.i hello.s hello.o hello</code> 。</p>
<p>但是这种书写形式不是很严谨，因为可能在当前目录下面存在文件名为 clean 的文件，因为这时候， 后面没有依赖文件，所以make 就认为这个文件是最新的，所以就不会执行 <code>rm -rf hello.i hello.s hello.o hello</code> 。所以为了避免这种情况的发生，所以建议使用这种写法：</p>
<pre class=" language-c"><code class="language-c"><span class="token punctuation">.</span>PHONY<span class="token punctuation">:</span>clean
clean<span class="token punctuation">:</span>
    rm <span class="token operator">-</span>rf hello<span class="token punctuation">.</span>i hello<span class="token punctuation">.</span>s hello<span class="token punctuation">.</span>o hello # 删除编译生成文件</code></pre>
<p>使用 <code>.PHONY</code> 说明clean是一个伪目标。</p>
<h1 id="4、make是如何工作的？"><a href="#4、make是如何工作的？" class="headerlink" title="4、make是如何工作的？"></a>4、make是如何工作的？</h1><p>当我们只输入<code>make</code> 命令。那么：</p>
<p>（1）make 会在当前目录下找名字叫<code>Makefile</code>或<code>makefile</code>的文件。</p>
<p>（2）如果找到，它会找文件中的第一个目标文件（<code>target</code>），在上面的例子中，它会找到<code>hello</code>这个文件，并把这个文件作为最终的目标文件 。</p>
<p>（3）如果 <code>hello</code>文件不存在，或是<code>hello</code> 所依赖的后面的 <code>.o</code>文件，的文件修改时间要比 <code>hello</code> 这个文件新，那么，他就会执行后面所定义的命令来生成 hello 这个文件。<br>（4）如果<code>hello</code>所依赖的 <code>.o</code> 文件也存在，那么<code>make</code>会在当前文件中找目标为<code>.o</code>文件的依赖性，如果找到则再根据那一个规则生成<code>.o</code>文件。（这有点像一个堆栈的过程）<br>（5）当然，我们的<code>c</code>文件和<code>h</code> 文件是存在的啦，于是 <code>make</code> 会生成 <code>.o</code>文件，然后再用 <code>.o</code> 文件生命<code>make</code> 的终极任务，也就是执行文件 <code>hello</code>了。</p>
<p>这就是整个<code>make</code> 的依赖性，<code>make</code> 会一层又一层地去找文件的依赖关系，直到最终编译出第一个目标文件。在找寻的过程中，如果出现错误，比如最后被依赖的文件找不到，那么 make 就会直接退出，并报错，而对于所定义的命令的错误，或是编译不成功，make 根本不理。 </p>
<p>像<code>clean</code> 这种伪目标，没有被第一个目标文件直接或间接关联，那么它后面所定义的命令将不会被自动执行。</p>
<p>以上就是本次的笔记分享，主要介绍make工具、Makefile文件大概有哪些内容、make是如何工作的。如有错误，欢迎指出！</p>
<p>参考资料：</p>
<pre class=" language-c"><code class="language-c">《嵌入式Linux上的C语言编程实践》、
https<span class="token punctuation">:</span><span class="token operator">/</span><span class="token operator">/</span>segmentfault<span class="token punctuation">.</span>com<span class="token operator">/</span>a<span class="token operator">/</span><span class="token number">1190000003756084</span>#articleHeader4、
https<span class="token punctuation">:</span><span class="token operator">/</span><span class="token operator">/</span>blog<span class="token punctuation">.</span>csdn<span class="token punctuation">.</span>net<span class="token operator">/</span>haoel<span class="token operator">/</span>article<span class="token operator">/</span>details<span class="token operator">/</span><span class="token number">2886</span></code></pre>
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                            1、前言之前分享了Linux下vim编译器简单的使用方法：【Linux笔记】Vi/Vim编辑器。如果觉得不习惯的话，也可以不用vim进行编辑。我们可以使用Windows上的一些编辑器先编辑好代码，然后再传到Linux下进行编译即可。那么，怎
                        
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                            1、如何编译具有多个源码（.c文件）的工程上一篇笔记写了如何使用gcc的编译命令编译：【Linux笔记】Linux下编译C程序。当源文件较少时，使用gcc编译命令编译就比较方便，在gcc编译命令中依次列出各个源文件就好，比如：
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